The Open NAND Flash Interface (ONFI) is an industry Workgroup that defines standardized component-level interface specifications as well as connector and module form factor specifications for NAND flash memory devices. ONFI revision 4.1 (December 2017) at section 5.30.4.4 defines a Write-RX training algorithm which is performed to adjust NAND receiver DQ-DQS timing. A data input/output signal is represented as a DQ signal and the data strobe signal is represented as a DQS signal. The DQS signal is driven by the host when the host writes data via the DQ signal into the NAND device. The DQS signal is driven by the NAND device when the NAND device sends data via the DQ signal to the host. Each rising and falling edge of the DQS signal can be used to read or write data.
For example, ONFI revision 4.1 training sequences are supported by NAND flash devices with interface speeds greater than 800 mega transfers per second (MT/s). A Solid State Drive (SSD) can include NAND flash devices. The ONFI revision 4.1 training sequence adds to the time to complete an SSD power-up sequence. The time to complete an SSD power-up sequence impacts how quickly an SSD is available for use by a customer after powering up.